The placement and connection of packaged integrated circuit components onto circuit boards is, of course, a major manufacturing step in the manufacture of modern computer systems. As more logic and circuit functions are integrated into single components (i.e., integrated circuit "chips"), and as the form factor for such circuit boards becomes smaller and more compact, the step of physical and electrical connection between the circuit boards or other system installation and the component is becoming a more difficult and precise operation.
For example, conventional packages for many very large scale integrated ("VLSI") circuits, especially those performing complex logic functions such as gate arrays and microprocessors, are pin-grid-array type packages having on the order of sixty to one hundred external terminals. The size of these packages is currently on the order of one inch on a side, with the terminal pins being disposed under the package. Leadless packages are also now available which have a similar number and density of terminals, but with low-profile or flush terminals rather than pins, to allow for surface mounting of the components onto circuit boards according to modern techniques. For these modern integrated circuit packages having a large number of terminals in a small area, high precision equipment and techniques are required for proper and reliable connection of all of the terminals onto a circuit board.
Since the placement and connection of such components is a difficult operation, it is of course useful to test the circuit board after assembly of the components thereon to ensure that proper connection has been made to each of the terminals for the circuit. Besides the testing of the continuity of connection between board and component, other functional testing is of course conventionally performed in order to ensure that the completed circuit board functions as specified for the end product.
Continuity testing is conventionally performed at the component level by the manufacturer of the component, and also possibly at an incoming inspection prior to the assembly operation. A conventional technique for such testing is to interrogate parasitic diodes on the integrated circuit chip itself. If the presence of the diode can be detected, the tester concludes that continuity between the test hardware and the chip is present. This continuity testing, for packaged components, thus tests the connection between the component package and the semiconductor integrated circuit chip mounted therewithin. These connections are conventionally made by way of wire bond, solder bumps, and the like.
However, conventional integrated circuit construction, providing such parasitic diodes, does not allow for easy detection of continuity once the packaged component is installed in a system where one or more, and possibly all, of the terminals for each component are connected in parallel with corresponding terminals of other components. This places the parasitic diodes of each component in parallel with those diodes in other components, so that the detection of a diode in a conventional continuity test allows only the conclusion that continuity exists for at least one of the packaged components. However, a lack of continuity at a terminal of one component, connected in parallel with other components, will not be detected so long as continuity exists for any one of the parallel terminals.
As a result, the board manufacturer can only test continuity by the exercising of the functional circuitry for each component, with continuity presumed from successful functional operation of the circuit. This is of course effective for those circuit boards (and components) which pass the test, as the components are tested for both continuity and functionality anyway. However, if a component fails a functional test at the board level, such a failure will not necessarily indicate whether the failure is due to a poor connection (i.e., lack of continuity) to one of the component terminals, due to a failure within the integrated circuit itself, or due to another cause such as a fault with the circuit board or a neighboring component.
This difficulty in determining the cause of failure of a functional test is increased for VLSI logic circuits, which are generally tested by way of stimuli, or vectors, which are determined during the design and simulation of the circuit. Such vectors may not correspond to an operation that the circuit will perform in its intended use, but is designed to fully exercise most, if not all, of the internal nodes and circuits in the shortest amount of time. However, the nature of continuity failures is such that the response of the circuit to such test vector sequences may not be predictable. Accordingly, determination of a continuity failure via analysis of the circuit response to the test vector sequence is either not possible, or alternatively requires significant development expense in simulating such a fault.
In addition, it should be noted that the rework required in the manufacture of a computer system to remedy a component failure of course varies with the failure mechanism. A continuity fault due to a poor connection may generally be reworked merely by reconnecting the packaged component. In contrast, a failure within the integrated circuit itself requires identification of the failing circuit and its replacement on the board. Failures due to marginality of the design of the system require a design change, or tolerance of yield loss due to the marginality. In order to maintain efficient production, the selection of the appropriate rework or corrective action for a failing board should be done with minimal technician troubleshooting. Without the ability to perform an independent component-by-component continuity test, however, such troubleshooting of manufactured circuit boards and computer systems becomes quite complex and time-consuming.
It is therefore an object of this invention to provide an integrated circuit which allows for individual continuity testing after installation in parallel with other packaged integrated circuits on a board or in a system.
It is a further object of this invention to provide a system, and method of testing the same, which allows for individual continuity testing of each component installed in the system.
It is a further object of this invention to provide such a system and method which provides for improved troubleshooting of manufactured boards and systems during their manufacture.
Other objects and advantages of the invention will become apparent to those of ordinary skill in the art having reference to the following specification together with its drawings.